From 8fd26cd8102aab00392c6c5752a9af27fea06452 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nils=20O=2E=20Sel=C3=A5sdal?= Date: Wed, 13 Nov 2013 23:18:42 +0100 Subject: [PATCH] Add a compiler and hardware memory barrier macro --- include/ucore/atomic.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/ucore/atomic.h b/include/ucore/atomic.h index 7d7821e..bc105b9 100644 --- a/include/ucore/atomic.h +++ b/include/ucore/atomic.h @@ -40,6 +40,18 @@ */ #define UC_ATOMIC_CAS(ptr, oldval, newval) __sync_val_compare_and_swap((ptr), (oldval), (newval)) +/** Issue a full (hardware) memory barrier. + * preventing the cpu to move load/stores across + * the barrier. (This implies a compiler barrier as well) + * */ +#define UC_MEM_BARRIER() __sync_synchronize() + +/** Issue a full compiler/software only memory barrier + * preventing compiler optimization to move load/stores across + * the barrier. + * */ +#define UC_COMPILER_BARRIER() __asm__ __volatile__("": : :"memory") + #else #error "No atomic operations implemented for this compiler" #endif